| Message ID | 1493363844-11762-1-git-send-email-santan.kumar@nxp.com |
|---|---|
| State | Accepted |
| Delegated to: | York Sun |
| Headers | show |
On 04/28/2017 12:14 AM, Santan Kumar wrote: > This patch adjusts memory map for images on LS2080ARDB, > LS2080AQDS as per below memory map for NOR flash: > Image Flash Offset > RCW+PBI 0x00000000 > Boot firmware (U-Boot) 0x00100000 > Boot firmware Environment 0x00300000 > PPA firmware 0x00400000 > PHY firmware 0x00980000 > DPAA2 MC 0x00A00000 > DPAA2 DPL 0x00D00000 > DPAA2 DPC 0x00E00000 > Kernel.itb 0x01000000 How about secure boot header files? York
> -----Original Message----- > From: York Sun [mailto:york.sun@nxp.com] > Sent: Friday, April 28, 2017 9:25 PM > To: Santan Kumar <santan.kumar@nxp.com>; u-boot@lists.denx.de > Cc: Priyanka Jain <priyanka.jain@nxp.com> > Subject: Re: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory map for > NOR-boot > > On 04/28/2017 12:14 AM, Santan Kumar wrote: > > This patch adjusts memory map for images on LS2080ARDB, LS2080AQDS as > > per below memory map for NOR flash: > > Image Flash Offset > > RCW+PBI 0x00000000 > > Boot firmware (U-Boot) 0x00100000 > > Boot firmware Environment 0x00300000 > > PPA firmware 0x00400000 > > PHY firmware 0x00980000 > > DPAA2 MC 0x00A00000 > > DPAA2 DPL 0x00D00000 > > DPAA2 DPC 0x00E00000 > > Kernel.itb 0x01000000 > > How about secure boot header files? > > York Secure header is expected at 0x600000 offset. Secure boot team will send additional patch on top of this for secure header related change. Priyanka
> -----Original Message----- > From: Priyanka Jain > Sent: Monday, May 01, 2017 11:00 AM > To: york sun <york.sun@nxp.com>; Santan Kumar <santan.kumar@nxp.com>; > u-boot@lists.denx.de > Cc: Sumit Garg <sumit.garg@nxp.com> > Subject: RE: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory map > for NOR-boot > > > > > -----Original Message----- > > From: York Sun [mailto:york.sun@nxp.com] > > Sent: Friday, April 28, 2017 9:25 PM > > To: Santan Kumar <santan.kumar@nxp.com>; u-boot@lists.denx.de > > Cc: Priyanka Jain <priyanka.jain@nxp.com> > > Subject: Re: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory > > map for NOR-boot > > > > On 04/28/2017 12:14 AM, Santan Kumar wrote: > > > This patch adjusts memory map for images on LS2080ARDB, LS2080AQDS > > > as per below memory map for NOR flash: > > > Image Flash Offset > > > RCW+PBI 0x00000000 > > > Boot firmware (U-Boot) 0x00100000 > > > Boot firmware Environment 0x00300000 > > > PPA firmware 0x00400000 > > > PHY firmware 0x00980000 > > > DPAA2 MC 0x00A00000 > > > DPAA2 DPL 0x00D00000 > > > DPAA2 DPC 0x00E00000 > > > Kernel.itb 0x01000000 > > > > How about secure boot header files? > > > > York > Secure header is expected at 0x600000 offset. > Secure boot team will send additional patch on top of this for secure header > related change. > Priyanka Can you please add Secure boot headers at 0x600000 offset as part of this patch only? As space at 0x600000 offset is reserved for Secure boot headers as per new memory map. Sumit
-----Original Message----- From: Sumit Garg Sent: Monday, May 01, 2017 11:23 AM To: Priyanka Jain <priyanka.jain@nxp.com>; u-boot@lists.denx.de Cc: york sun <york.sun@nxp.com>; Santan Kumar <santan.kumar@nxp.com> Subject: RE: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot > -----Original Message----- > From: Priyanka Jain > Sent: Monday, May 01, 2017 11:00 AM > To: york sun <york.sun@nxp.com>; Santan Kumar <santan.kumar@nxp.com>; > u-boot@lists.denx.de > Cc: Sumit Garg <sumit.garg@nxp.com> > Subject: RE: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory > map for NOR-boot > > > > > -----Original Message----- > > From: York Sun [mailto:york.sun@nxp.com] > > Sent: Friday, April 28, 2017 9:25 PM > > To: Santan Kumar <santan.kumar@nxp.com>; u-boot@lists.denx.de > > Cc: Priyanka Jain <priyanka.jain@nxp.com> > > Subject: Re: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust > > memory map for NOR-boot > > > > On 04/28/2017 12:14 AM, Santan Kumar wrote: > > > This patch adjusts memory map for images on LS2080ARDB, LS2080AQDS > > > as per below memory map for NOR flash: > > > Image Flash Offset > > > RCW+PBI 0x00000000 > > > Boot firmware (U-Boot) 0x00100000 > > > Boot firmware Environment 0x00300000 > > > PPA firmware 0x00400000 > > > PHY firmware 0x00980000 > > > DPAA2 MC 0x00A00000 > > > DPAA2 DPL 0x00D00000 > > > DPAA2 DPC 0x00E00000 > > > Kernel.itb 0x01000000 > > > > How about secure boot header files? > > > > York > Secure header is expected at 0x600000 offset. > Secure boot team will send additional patch on top of this for secure > header related change. > Priyanka Can you please add Secure boot headers at 0x600000 offset as part of this patch only? As space at 0x600000 offset is reserved for Secure boot headers as per new memory map. Sumit Secure header has been added by secure boot team with a follow up patch. https://patchwork.ozlabs.org/patch/757572/ Santan
On 04/28/2017 12:14 AM, Santan Kumar wrote: > This patch adjusts memory map for images on LS2080ARDB, > LS2080AQDS as per below memory map for NOR flash: > Image Flash Offset > RCW+PBI 0x00000000 > Boot firmware (U-Boot) 0x00100000 > Boot firmware Environment 0x00300000 > PPA firmware 0x00400000 > PHY firmware 0x00980000 > DPAA2 MC 0x00A00000 > DPAA2 DPL 0x00D00000 > DPAA2 DPC 0x00E00000 > Kernel.itb 0x01000000 > > Signed-off-by: Santan Kumar <santan.kumar@nxp.com> > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> > --- > Changes for v2: > 1. Rebase on the top of Priyanka's QSPI patch > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpatch%2F756222%2F&data=01%7C01%7Cyork.sun%40nxp.com%7Cf48a7f1714bf492e3b7708d48e064619%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0&sdata=HiqkWpMouHRUJJGF%2BQ%2F27yQ2tkoaGGJkiGcfiJFHrxI%3D&reserved=0 Applied to fsl-qoriq master, awaiting upstream. Thanks. York
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index d0770c0..4d82257 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -162,7 +162,7 @@ config SYS_LS_PPA_FW_ADDR depends on FSL_LS_PPA default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A default 0x40500000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x580a00000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A + default 0x580400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A default 0x60500000 if SYS_LS_PPA_FW_IN_XIP default 0x500000 if SYS_LS_PPA_FW_IN_MMC default 0x500000 if SYS_LS_PPA_FW_IN_NAND diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index 2808bd5..fd0e25a 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -89,6 +89,18 @@ c) NAND boot d) SD boot e) QSPI boot +Memory map for NOR boot +------------------------- +Image Flash Offset +RCW+PBI 0x00000000 +Boot firmware (U-Boot) 0x00100000 +Boot firmware Environment 0x00300000 +PPA firmware 0x00400000 +DPAA2 MC 0x00A00000 +DPAA2 DPL 0x00D00000 +DPAA2 DPC 0x00E00000 +Kernel.itb 0x01000000 + Environment Variables --------------------- - mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index 873aadf..0003b45 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -71,6 +71,19 @@ a) NOR boot b) NAND boot c) QSPI boot +Memory map for NOR boot +------------------------- +Image Flash Offset +RCW+PBI 0x00000000 +Boot firmware (U-Boot) 0x00100000 +Boot firmware Environment 0x00300000 +PPA firmware 0x00400000 +Cortina PHY firmware 0x00980000 +DPAA2 MC 0x00A00000 +DPAA2 DPL 0x00D00000 +DPAA2 DPC 0x00E00000 +Kernel.itb 0x01000000 + cfg_rcw_src switches needs to be changed for booting from different option. Refer to board documentation for correct switch setting. diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index cc61af8..dd56114 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -193,18 +193,18 @@ unsigned long long get_qixis_addr(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581200000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "console=ttyAMA0,38400n8\0" \ - "mcinitcmd=fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" + "mcinitcmd=fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500 " \ "ramdisk_size=0x2000000 default_hugepagesz=2m" \ " hugepagesz=2m hugepages=256" -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580700000 &&" \ +#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 16ef350..fc52c26 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -274,7 +274,7 @@ unsigned long get_board_ddr_clk(void); #ifndef CONFIG_QSPI_BOOT #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x2000 #endif @@ -386,12 +386,12 @@ unsigned long get_board_ddr_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ - "mcinitcmd=fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" + "mcinitcmd=fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" #endif /* CONFIG_SECURE_BOOT */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index dd72aa0..f61b82f 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -248,7 +248,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x2000 #endif @@ -392,13 +392,13 @@ unsigned long get_board_sys_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ "fdtfile=fsl-ls2080a-rdb.dtb\0" \ - "mcinitcmd=fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" \ + "mcinitcmd=fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" \ BOOTENV #endif #endif @@ -418,7 +418,7 @@ unsigned long get_board_sys_clk(void); " || run distro_bootcmd" #else /* Try to boot an on-NOR kernel first, then do normal distro boot */ -#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580700000" \ +#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580d00000" \ " && cp.b $kernel_start $kernel_load $kernel_size" \ " && bootm $kernel_load" \ " || run distro_bootcmd" @@ -434,7 +434,7 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_QSPI_BOOT #define CONFIG_CORTINA_FW_ADDR 0x20980000 #else -#define CONFIG_CORTINA_FW_ADDR 0x581000000 +#define CONFIG_CORTINA_FW_ADDR 0x580980000 #endif #define CONFIG_CORTINA_FW_LENGTH 0x40000